{"id":2879,"date":"2016-09-26T15:28:06","date_gmt":"2016-09-26T05:28:06","guid":{"rendered":"https:\/\/www.finiteelementanalysis.com.au\/?p=1077"},"modified":"2016-09-26T15:28:06","modified_gmt":"2016-09-26T05:28:06","slug":"developing-power-electronic-products-in-the-ansys-electronic-desktop","status":"publish","type":"post","link":"https:\/\/www.leapaust.com.au\/blog\/emag\/developing-power-electronic-products-in-the-ansys-electronic-desktop\/","title":{"rendered":"Developing Power Electronic Products in the ANSYS Electronic Desktop"},"content":{"rendered":"
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The development of power electronics products always relies on transient circuit simulation to evaluate the internal operation of the product and the effect of outside conditions in a wide variety of scenarios. With this design style in mind, circuit simulation has developed to focus on being extremely fast and parametric to allow circuit designers to run hundreds and thousands of iterations on a design per day. However, as product performance reaches ever higher and the design limitations become ever tighter, circuit simulation is starting to lack the accuracy and functionality required to predict the more expensive design metrics.<\/p>\n

Energy losses due to skin effects, nonlinearities due to saturable magnetics, trace\/package coupling due to parasitics and high frequency harmonics due to fast switching semiconductors require detailed modelling to predict accurately. Modelling any one of these effects using lumped components is a challenging exercise in a lumped element circuit simulator, let alone attempting more than one. Certifying electronic products for Electromagnetic Compatibility (EMC) is quickly becoming one of the most costly parts of a product development, especially if multiple tests are required. Calculating and predicting the results of this test before the first prototype is built has the capacity to save significant test costs and accelerate time to market dramatically.<\/p>\n

The ANSYS Electronics Desktop (AEDT) has been designed with this workflow in mind. In the early stages of design, thousands of design points can be run in a lumped element circuit simulator. As the development cycle progresses further, lumped components can be seamlessly exchanged for 3D geometry to continue the product optimisation with little in the way of performance loss. This allows designers to easily balance the time constraints imposed on the development cycle.<\/p>\n

A Development Cycle Example – Electric Fence Energizer<\/h3>\n

An energizer is used to store a pre-defined amount of electrical energy and then discharge it in a safe manner onto a conductive. This allows fences which are not physically capable of restraining the animals in question to be built with adequate deterrence. At the same time while deterring animals, the fence must not be harmful to human beings who happen to be in contact momentarily.<\/p>\n

\"Gallagher
Figure 1 – Gallagher M5800i Energizer. Image courtesy of the Gallagher Group (https:\/\/gallagher.media\/wp-content\/uploads\/2014\/12\/M5800i-Energizer-and-Controller.jpg)<\/figcaption><\/figure>\n

Lumped Circuit Analysis<\/h3>\n

The general design consists of three main sections, a charging circuit to generate high voltage, a network of storage capacitors and a discharge circuit to generate high voltage pulses while safely isolating the fence from the mains supply.<\/p>\n

\"Lumped
Figure 2 – Lumped Element circuit model of a simple energizer<\/figcaption><\/figure>\n

This simulation assumes ideal components and no parasitics which is reasonable for general design iterations but very poor for detailed optimisation and verification. The following bullet points outline some typical design questions which could be evaluated and how long each would take to answer. All times were measured on a Dell Precision M6800 laptop using a single core:<\/p>\n

    \n
  • How many multiplier stages do I need to reach 1000V?\n
      \n
    • Add an extra stage and solve (1 solve with a schematic change, 27 seconds)<\/li>\n<\/ul>\n<\/li>\n
    • How fast does the charge circuit reach 800V? What is the peak current through the diodes?\n
        \n
      • Sweep multiplier capacitor capacitance value (20 values, 2 minutes)<\/li>\n<\/ul>\n<\/li>\n
      • What is the optimum ratio and values of inductance for the transformer primary\/secondary windings in order to reach 7kV with a 500\u2126 load?\n
          \n
        • Sweep primary\/secondary inductance (90 values, 9 minutes)<\/li>\n<\/ul>\n<\/li>\n
        • What output voltage and current is measured given a range of potential output loads?\n
            \n
          • Sweep output load resistance (13 values, 1 minute 20 seconds)<\/li>\n<\/ul>\n<\/li>\n<\/ul>\n

            For each of these simulations, all of the generated waveforms are available for review. As an example we could evaluate the stress imposed on the storage capacitors by measuring the voltage and current during a number of charge\/discharge cycles.<\/p>\n

            \"Charge\/Discharge
            Figure 3 – Charge\/Discharge cycle of the storage capacitor bank<\/figcaption><\/figure>\n

            Depending on the length of grass, condition of the fence and the weather, an electric fence an effective load resistance which varies dramatically. The AEDT can automatically produce a set of output waveforms with each design change to graphically represent how the energizers performance changes based on the load resistance and therefore track performance improvements over time. Architecture changes can be implemented easily at this stage so the EMI performance of the pulse is also evaluated to establish a base line.<\/p>\n

            \"Energizer
            Figure 4 – Energizer output waveform for a range of output loads from 1\u2126 to 10000\u2126<\/figcaption><\/figure>\n
            \"FFT
            Figure 5 – FFT of the output pulse into a 500\u2126 load<\/figcaption><\/figure>\n

            Finite Element Analysis \u2013 Transformer Inductance and Capacitance<\/h3>\n

            The energy generated at the output of the transformer needs to be limited to meet safety standards while still delivering high output voltages and currents when required to adequately drive the fence load. This depends on accurately designing the core to saturate under certain conditions and limit the output power. As with the circuit simulation, there are some key design questions that are evaluated at this stage:<\/p>\n